ELEC 2200-003 Digital Logic Circuits
Fall 2011, MWF 2PM, Broun 113
Course Syllabus, Grading Sheet, Statistics

Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE, Broun 323, Office hours: MF 3:00-4:00PM.

Teaching Assistant: Bei Zhang, Broun 468, Consultation: MW 10-11:30AM.

Textbook: V. P. Nelson, H. T. Nagle, B. D. Carroll and J. D. Irwin, Digital Logic Circuit Analysis and Design, Prentice-Hall, 1995.

EXAM SCHEDULE:
Test 1: Wednesday, 9/21/11, 2:00PM-2:50PM, Broun 113, open book (books, notes, computer, calculator allowed)
Test 2: Wednesday, 10/12/11, 2:00PM-2:50PM, Broun 113, open book (books, notes, computer, calculator allowed)
Test 3: Monday, 11/14/11, 2:00PM-2:50PM, Broun 113, open book (books, notes, computer, calculator allowed)
Final Exam, Thursday, 12/08/11, 4:00-6:30PM, Broun 113, use of textbook, class lectures, notes, computer, etc., permitted

HOMEWORK:
Homework 1, assigned 8/22/11, due 8/29/11
Homework 2, assigned 9/2/11, due 9/12/11
Homework 3, assigned 9/14/11, due 9/19/11
Classwork 4, assigned 9/30/11, due 9/30/11
Homework 5, assigned 10/3/11, due 10/10/11
Homework 6, assigned 10/17/11, due 10/24/11
Homework 7, assigned 10/26/11, due 10/31/11
Homework 8, assigned 11/4/11, due 11/11/11

LECTURES AND READING ASSIGNMENTS: For details see webpages of recent years.
. . . What did 2010 Physics Nobel Prize have to do with transistor?
. . . Also read about this new type of transistor in the article "Graphine Unzipped".
How a chip is made

PREVIOUS OFFERING BY V. AGRAWAL:
Fall 2010 Fall 2008