ELEC 2200-001 Digital Logic Circuits
Fall 2010, TuTh 11AM, Broun 239
Course Syllabus Grading Sheet (Final)
Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE, Broun 323, Office hours: M-F 12:15-1:15PM
Teaching Assistant: Mridula Allani, Phone 321-946-8007, Broun 359, Consultation: TuTh 10-11AM.
Textbook: V. P. Nelson, H. T. Nagle, B. D. Carroll and J. D. Irwin, Digital Logic Circuit Analysis and Design, Prentice-Hall, 1995.

EXAM SCHEDULE:
Test 1, Thursday, 9/16/10, 11:00AM-12:15PM, Broun 239, open book (books, notes, computer, calculator allowed)
Test 2, Thursday, 10/12/10, 11:00AM-12:15PM, Broun 239, open book (books, notes, computer, calculator allowed)
Test 3, Thursday, 11/4/10, 11:00AM-12:15PM, Broun 239, open book (books, notes, computer, calculator allowed)
Final Exam, Tuesday, 12/07/10, 12:00-2:30PM, Broun 239, use of textbook, class lectures, notes, computer, etc., is permitted

HOMEWORK:
Homework 1, assigned 8/31/10, due 9/7/10
Homework 2, assigned 9/7/10, due 9/14/10
Homework 3, assigned 9/21/10, due 9/28/10
Homework 4, assigned 9/28/10, due 10/5/10
Homework 5, assigned 10/5/10, due 10/12/10
Homework 6, assigned 10/21/10, due 10/28/10
Homework 7, assigned 11/2/10, due 11/9/10 (see Lecture 7)
Homework 8, assigned 11/16/10, due 11/30/10

LECTURES: For details see websites of recent years.
. . . What does 2010 Physics Nobel Prize have to do with transistor?
. . . Also read about this new type of transistor in the article "Graphine Unzipped".
Lecture 7: Introduction to VHDL (M. Allani), pptx or pdf, 11/2/10

PREVIOUS OFFERING BY V. AGRAWAL:
Fall 2008