INDIAN INSTITUTE OF TECHNOLOGY - DELHI
FALL 2013 M.Tech. Course: VLSI Testing
(EEV834, Special Module in VLSI Testing)
Aug 17-29, 2013, 2:30-4:30PM
Course Syllabus

Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE, Auburn University
Teaching Assiatant: K. Lakshmi, jvl122903@ee.iitd.ernet.in, VDTT Lab.

Grade sheet

EXAM: Take-home problems, assigned August 26, 2013, due August 29, 2013, by 5:00PM.

HOMEWORK:
Homework 1, assigned Aug 17, due Aug 19.
Homework 2, assigned Aug 19, due Aug 21.
Homework 3, assigned Aug 23, due Aug 26.
Homework 4, assigned Aug 26, due Aug 29.

LECTURES (17):
Lecture 1: Introduction, Aug 17, 2013
Lecture 2: Yield and Quality, Aug 17, 2013
Lecture 3: Fault Modeling, Aug 19, 2013
Lecture 4: Testability Analysis, Aug 19, 2013
Lecture 5: Logic Simulation, Aug 20, 2013
Lecture 6: Fault Simulation, Aug 20, 2013
Lecture 7: Combinational ATPG, Aug 21, 2013
Lecture 8: Squential ATPG, Aug 21, 2013
Lecture 9: Delay Test, Aug 23, 2013
Lecture 10: Memory Test, Aug 23, 2013
Lecture11: Analog Test, Aug 24, 2013
Lecture 12: Alternate Test, Aug 24, 2013
Lecture 13: DFT and Scan, Aug 24, 2013
Lecture 14: BIST, Aug 26, 2013
Lectures 15: System Diagnosis, Aug 26, 2013
Lectures 16: RF Testing - I, Aug 27, 2013
Lectures 17: RF Testing - II, Aug 27, 2013

PREVIOUS OFFERINGS BY PROF. V. AGRAWAL:
Summer 2012 VLSI Testing, IIT Delhi, July 24 - Aug 3, 2012
Summer 2011 Low-Power Design of Digital VLSI Circuits, IIT Delhi, July 26 - Aug 6, 2011
Summer 2010 VLSI Testing, IIT Delhi, Aug 7-13, 2010
Summer 2009 VLSI Testing, IIT Delhi, July 30 - Aug 13, 2009