ELEC 7770-001 Advanced VLSI Design
Spring 2007, TuTh 12:30-1:45PM, Broun 235
Course Syllabus (Not updated for this offering)

FINAL EXAM: Problems Grades Statistic
Schedule: Friday, May 4, 2007, 5PM - 7:30PM, Broun 235
Exam will contain five or six problems, all to be worked out. Use of notes, books, computers is permitted. While the student is responsible for the material in the entire syllabus, lectures and project work, to make the exam manageable the problems will be derived from the following topic list: Low-power storage elements, BDD and equivalence checking, Elmore delay formula, zero-skew clock design, retiming and clock optimization, and fault-tolerant design for SEU.

IMPORTANT NOTE: Please submit any remaining items (homework, project report, project presentation) by 5/3/07 via EMAIL. Thank you.

Reading assignment for 1/9/07 and 1/11/07: A Tutorial on Emerging Nanotechnology Devices
Optional reading: A Review of Carbon Nanotube Field Effect Transistors
Please note that the class will meet first time on Tuesday, January 16, 2007.

Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE

Course Website: www.eng.auburn.edu/~vagrawal/COURSE/E7770_Spr07/course.html

HOMEWORKS:
Homework 1, Problems assigned 2/6/07, due 2/13/07
Homework 2, Problems assigned 2/20/07, due 2/27/07
Homework 3, Problems assigned 4/2/07, due 4/17/07

PROJECT
Architecture: Matthew Anderson, ISA, etc., Schematic 1/31/07, Presentation 4/24/07
System Design: Chris Erickson, Presentation 4/24/07
Verification: Bobby Dixon, Presentation 4/24/07
Synthesis: Lee Lerner, Presentation 4/24/07
Report 4/24/07 (Anderson, Dixon, Erickson, Lerner)
Design for Testability: Sreekumar Menon
Power Analysis: Sai Siddharth Kumar Dantu, Report 5/4/07, Presentation 4/26/07
Physical Layout: Kyungseok Kim, Report 4/27/07, Presentation 4/26/07
Timing Analysis: Chaitanya Bandi, Report 4/26/07, Presentation 4/26/07
Test Generation: Hillary Grimes, Report 5/4/07, Presentation 4/26/07

LECTURES:
Lecture 1: Introduction 1/16/07
Lecture 2: Nanotechnology Devices 1/18/07
. . . A Tutorial on Emerging Nanotechnology Devices
. . . A Review of Carbon Nanotube Field Effect Transistors
. . . Architectures for Silicon Nanoelectronics and Beyond, Computer, vol. 40, no. 1, pp. 25-33, January 2007
Lecture 3: Moore's Law 1/23/07
. . . Gordon Moore's articles, 1965, 1975, 1995
Lecture 4: VLSI System DFT 1/25/07
Lecture 5: SOC Test Scheduling 1/30/07
Lecture 6: Verification 2/6/07
Lecture 7: Logic Equivalence 2/8/07
. . . Choice of Tests for Verification and Equivalence Checking . . .
. . . Characteristic Polynomial Method for Verification . . .
. . . A New Model for Computation of Probabilistic Testability . . .
Lecture 8: Binary Decision Diagrams 2/13/07
Lecture 9: Power Dissipation in CMOS Chips 2/15/07
Lecture 10: Reducing Power through Multicore Parallelism 2/20/07
Lecture 11: Power Aware Microprocessors 2/22/07
Lecture 12: Power Consumption in a Memory 2/27/07
Lecture 13: Timing Simulation and STA 3/1/07, 3/6/07
Lecture 14: Timing Verification and Optimization 3/8/07
Lecture 15: Linear Programming - A Mathematical Optimization Technique 3/13/07, 3/15/07
Lecture 16: A Linear Programming Solution to Clock Constraint Problem 3/20/07
Lecture 17: Clock Skew Problem 3/22/07
Lecture 18: Zero-Skew Design 4/3/07
Lecture 19: Retiming 4/5/07
Lecture 20: Constraint Graph and Performance Optimization 4/10/07
. . . Robust System Design with Built-In Soft-Error Resilence, Computer, vol. 38, no. 2, pp. 43-52, February 2005
Lecture 21: Soft Errors and Fault-Tolerant Design 4/17/07, 4/19/07