ELEC 5200-001/6200-001 Computer Architecture and Design
Spring 2010, MWF 11AM, Broun 306
Course Syllabus
Grades
Statistics
Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE
Teaching Assistant: Manish Kulkarni, 334-332-0556, B359,
consulting hours: MWF 10:00-11:00AM.
Last Class Day: May 4, 2010, B306, 11AM.
EXAM SCHEDULE:
Test 1, Monday, 3/8/10, 11:00-11:50AM, Broun 306, use of books, notes, etc., permitted,
statistic.
Test 2, Wednesday, 3/31/10, 11:00-11:50AM, Broun 306, use of books, notes, etc., permitted,
statistic.
Final Exam, Thursday, May 6, 2010, 12:00-2:30PM, Broun 306, use of books, notes, etc., permitted,
statistic
PROJECT:
Spring 2010 Project Assignment, Monday, 2/8/10
Part 1 ISA, report due Friday, 2/19/10
Part 2 Datapath, report due Friday, 3/5/10
Part 3 Datapath Verification, report due Friday, 3/26/10
Part 4 Control Unit, report due Friday, 4/9/10
Part 5 FPGA Implementation, demo and report completed Monday, 4/26/10
INSTRUCTIONS FOR DEMO:
1. Briefly describe what is implemented, what program you will run and what result is expected.
2. Run the program pointing to the functions of the buttons you press. Let the viewer examine the result.
3. Offer to make a change to some parameter to a viewer selected value and rerun the demo.
4. Total duration of demo: FIVE MINUTES.
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Project feedback from Fall 2009 students:
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Project feedback from Fall 2008 students:
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Project feedback from Spring 2008 students:
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Project feedback from Fall 2007 students:
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VHDL references and relevant files for Project and Homework 1:
VHDL Review (Lecture from Fall 2009)
Modeling for Synthesis (Lecture from Fall 2009)
Overview of VHDL by Prof. Stroud
References on VHDL by Prof. Stroud
Lectures from Prof. Nelson's CAD course
Altera Quartus II and DE2 Manual (updated 4/24/10)
Leonardo Spectrum for Altera HDL Synthesis Manual
Altera MegaWizard Plug-In Manager Manual
Run time content editable memory tutorial
VHDL Files: hexto7seg.vhd,
regfile.vhd (updated 3/24/10)
CLASS PRESENTATIONS (Attendance is a must for satisfactory grade):
3/29/10 Parallelism via Multithreaded and Multicore CPUs, by Bradley Dutton (speaker),
O. Obayagbonna (scribe):
"Parallelism via Multithreaded and Multicore CPUs," A. C. Soden et al., Computer, vol 43, no. 3, pp. 24-32, March 2010.
4/2/10 Architectures for Extreme-Scale Computing, by Aaron Biddings (speaker),
Lincoln Anderson (scribe):
"Architectures for Extreme-Scale Computing," J. Torrellas, Computer, vol. 42, no. 11, pp. 28-35, Nov 2009.
4/2/10 Parallel Programming with Transactional Memory, by Pratibha Kona (speaker),
Anil Ust (scribe):
"Parallel Programming with Transactional Memory," U. Drepper, Comm. ACM, vol. 52, no. 2, pp. 38-43, February 2009.
4/30/10 Programming Multiprocessors with Explicitly Managed Memory Hierarchies, by Xin Jin (speaker),
Alexander Pfeiffenberger (scribe):
"Programming Multiprocessors with Explicitly Managed Memory Hierarchies," S. Schneider, et al., Computer, vol. 42, no. 12, pp. 28-34, Dec 2009.
4/30/10 Triple-Parity RAID and Beyond, by Hai Lu (speaker),
Nicholas Waters (scribe):
"Triple-Parity RAID and Beyond," A. Leventhal, Comm. ACM, vol. 53, no. 1, pp. 58-63, January 2010.
4/30/10 Recent Progress in Quantum Algorithms, by Min Zhang (speaker),
Navit Yahdav (scribe):
"Recent Progress in Quantum Algorithms," D. Bacon and W. van Dam, Comm. ACM, vol. 53, no. 2, pp. 84-93, February 2010.
HOMEWORKS:
Homework 1: Design of multiplexers, register and ALU, assigned 1/15/10, due 1/29/10,
Modelsim Tutorial (Spring 2010)
Homework 2, assigned 2/10/10, due 2/17/10.
Homework 3, assigned 2/17/10, due 2/24/10.
Homework 4, assigned 3/1/10, due 3/8/10.
Homework 5, assigned 3/10/10, due 3/22/10.
Homework 6 (updated), assigned 3/22/10, due 4/12/10.
Homework 7, assigned 4/12/10, due 4/19/10.
Homework 8, assigned 4/26/10, due 5/3/10.
LECTURES: See webpages of most recent years.
PREVIOUS OFFERINGS BY PROF. V. AGRAWAL:
Fall 2009
Spring 2009
Fall 2008
Spring 2008
Fall 2007
Spring 2007
Fall 2006
Fall 2005
Fall 2004