ELEC 5200-001/6200-001 Computer Architecture and Design
Fall 2007, MWF 11AM, Broun 306
Course Syllabus, FINAL Grades Statistics
Instructor: Vishwani D. Agrawal, James J. Danaher Professor of ECE
Teaching Assistant: Khushboo Sheth, Broun 359, 844-1865, Consultation: MWF 12:00-1:00, TuTh 12:30-1:30

EXAM SCHEDULE:
Test 1, Friday, 9/21/07, 11:00-11:50AM, Broun 306, statistic.
Test 2, Friday, 10/26/07, 11:00-11:50AM, statistic.
Final Exam, Tuesday, 12/11/07, 9:00AM-11:30AM, Broun 306, statistic.

PROJECT:
Assignment, Presentation, Friday, 8/24/07
Part 1 - ISA, report due Wednesday, 9/5/07
Part 2 - Datapath, report due Monday, 9/17/07
Part 3 - Datapath Verification, report due Monday, 10/8/07, extended to Wednesday, 10/17/07
Part 4 - Control Unit, report due Monday, 11/5/07, extended to Friday, 11/9/07
Part 5 - FPGA Implementation, demo and report due Friday, 11/16/07, extended to Wednesday, 11/28/07
INSTRUCTIONS FOR DEMO:
1. Briefly describe what is implemented, what program you will run and what result is expected.
2. Run the program pointing to the functions of the buttons you press. Let the viewer examine the result.
3. Offer to make a change to some parameter to a viewer selected value and rerun the demo.
4. Total duration of demo: FIVE MINUTES.
PART 5 CONCLUSION REPORTS: 1 2 3 4 5 6 7 8 9 10 11 12

Useful files:
Leonardo Spectrum for Altera HDL Synthesis Manual
qsim_logic.vhd. Compile and add "qsim_logic.vhd" to your current working directory. This will enable the 'to_interger' and 'to_stdlogicvector' functions used in the other files.
regfile.vhd is the code for a register file.
trans.vhd contains the code for a bidirectional bus interface.
Files for Part 4:
test.c is a test program in C.
Files for Part 5:
Altera MegaWizard Plug-In Manager Manual.
Altera Quartus II and DE2 Manual.
Altera DE2 Pin Assignments.
RAM_init.mif, Memory initialization file.

CLASS PRESENTATIONS (A student must attend at least 4 presentations for a satisfactory grade):
10/24/07 Ambale: Single-Chip Multi-Processors (CMP) slides
10/24/07 Wei: Asynchronous Processor Design slides
10/29/07 Kondareddy: Superscalars slides
10/29/07 McPherson: Vector Processors slides
10/31/07 Westrom: Virtual Processors slides

HOMEWORKS:
Homework 1, assigned 8/27/07, due 9/10/07.
Homework 2, assigned 9/6/07, due 9/17/07.
Homework 3, assigned 9/15/07, due 9/24/07.
Homework 4, assigned 10/1/07, due 10/8/07.
Homework 5, assigned 10/12/07, due 10/19/07.
Homework 6, assigned 10/29/07, due 11/5/07.
Homework 7, assigned 11/5/07, due 11/12/07.
Homework 8, assigned 11/9/07, due 11/16/07.
Homework 9, assigned 11/16/07, due 11/26/07.
Homework 10, assigned 11/26/07, due 12/3/07.

LECTURES: See webpages of most recent years.

PREVIOUS OFFERINGS BY PROF. AGRAWAL:
Spring 2007 Fall 2006 Fall 2005 Fall 2004